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#!/usr/bin/env python3
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"""Assemble one tests/<name>/program.asm and generate its golden (Expected outputs)."""
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from __future__ import annotations
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import argparse
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import os
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from pathlib import Path
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import shutil
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import struct
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import subprocess
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from rv32_model import RV32Model, read_words, write_words
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REPO_ROOT = Path(__file__).resolve().parents[1]
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def find_assembler(explicit: str | None) -> str:
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candidates = [
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explicit,
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os.environ.get("RISCV_AS"),
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REPO_ROOT / "scripts" / "riscv-none-elf-as",
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"riscv-none-elf-as",
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"riscv32-unknown-elf-as",
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"riscv64-unknown-elf-as",
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]
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for candidate in candidates:
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if not candidate:
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continue
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candidate = str(candidate)
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resolved = shutil.which(candidate)
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if resolved:
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return resolved
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path = Path(candidate)
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try:
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if path.is_file() and os.access(path, os.X_OK):
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return str(path)
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except OSError:
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continue
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raise RuntimeError(
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"RISC-V GNU assembler not found; "
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"or set RISCV_AS=/path/to/riscv-*-as"
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)
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def elf_text(path: Path) -> bytes:
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image = path.read_bytes()
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if image[:4] != b"\x7fELF" or image[4] != 1 or image[5] != 1:
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raise RuntimeError(f"{path} is not a little-endian ELF32 object")
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section_offset = struct.unpack_from("<I", image, 32)[0]
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section_size = struct.unpack_from("<H", image, 46)[0]
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section_count = struct.unpack_from("<H", image, 48)[0]
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names_index = struct.unpack_from("<H", image, 50)[0]
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names_header = section_offset + names_index * section_size
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names_offset, names_size = struct.unpack_from("<II", image, names_header + 16)
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names = image[names_offset:names_offset + names_size]
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for index in range(section_count):
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header = section_offset + index * section_size
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name_index = struct.unpack_from("<I", image, header)[0]
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end = names.find(b"\0", name_index)
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name = names[name_index:end].decode()
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if name == ".text":
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offset, size = struct.unpack_from("<II", image, header + 16)
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return image[offset:offset + size]
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raise RuntimeError(f"{path} has no .text section")
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def main() -> None:
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parser = argparse.ArgumentParser()
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parser.add_argument("test_dir", type=Path)
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parser.add_argument("--assembler")
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parser.add_argument("--max-instructions", type=int, default=10000)
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args = parser.parse_args()
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test_dir = args.test_dir.resolve()
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source = test_dir / "program.asm"
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if not source.is_file():
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raise RuntimeError(f"missing required {source}")
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assembler = find_assembler(args.assembler)
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obj = test_dir / "program.o"
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subprocess.run(
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[assembler, "-march=rv32i", "-mabi=ilp32", "-mno-relax", str(source), "-o", str(obj)],
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check=True,
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)
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text = elf_text(obj)
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if len(text) % 4:
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raise RuntimeError(".text size is not a multiple of four bytes")
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program = [int.from_bytes(text[i:i + 4], "little") for i in range(0, len(text), 4)]
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program_path = test_dir / "program.hex"
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write_words(program_path, program)
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data_path = test_dir / "data.hex"
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initial_data = read_words(data_path if data_path.exists() else None)
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model = RV32Model(program, initial_data)
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count = model.run(args.max_instructions)
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write_words(test_dir / "expected_regs.hex", model.regs)
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write_words(test_dir / "expected_data.hex", model.data_words())
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print(f"Built {test_dir.name}: {len(program)} words, halted after {count} instructions")
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if __name__ == "__main__":
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main()
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Executable
BIN
Binary file not shown.
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#!/usr/bin/env python3
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"""Small RV32I reference model used to generate processor test goldens."""
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from __future__ import annotations
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import argparse
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from pathlib import Path
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MASK32 = 0xFFFF_FFFF
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ISRAM_BASE = 0x0000
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DSRAM_BASE = 0x1000
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MEMORY_BYTES = 4096
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EBREAK = 0x0010_0073
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def sign_extend(value: int, bits: int) -> int:
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sign = 1 << (bits - 1)
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return (value & (sign - 1)) - (value & sign)
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def signed32(value: int) -> int:
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return sign_extend(value & MASK32, 32)
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def read_words(path: Path | None) -> list[int]:
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if path is None or not path.exists():
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return []
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words = []
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for line_number, line in enumerate(path.read_text().splitlines(), 1):
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token = line.split("#", 1)[0].strip()
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if token:
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try:
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words.append(int(token, 16) & MASK32)
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except ValueError as error:
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raise ValueError(f"{path}:{line_number}: invalid hex word") from error
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return words
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def write_words(path: Path, words: list[int | None]) -> None:
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lines = (
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"xxxxxxxx\n" if word is None else f"{word & MASK32:08x}\n"
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for word in words
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)
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path.write_text("".join(lines))
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class RV32Model:
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def __init__(self, program: list[int], initial_data: list[int]):
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if len(program) > MEMORY_BYTES // 4:
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raise ValueError("program exceeds the 1024-word ISRAM")
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if len(initial_data) > MEMORY_BYTES // 4:
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raise ValueError("initial data exceeds the 1024-word DSRAM")
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self.program = program
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self.data = bytearray(MEMORY_BYTES)
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self.defined = bytearray(MEMORY_BYTES)
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for index, word in enumerate(initial_data):
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self.data[index * 4:index * 4 + 4] = word.to_bytes(4, "little")
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self.defined[index * 4:index * 4 + 4] = b"\x01\x01\x01\x01"
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self.regs = [0] * 32
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self.pc = ISRAM_BASE
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self.highest_data_byte = len(initial_data) * 4
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def reg(self, index: int) -> int:
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return 0 if index == 0 else self.regs[index]
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def set_reg(self, index: int, value: int) -> None:
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if index:
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self.regs[index] = value & MASK32
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def data_offset(self, address: int, size: int) -> int:
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# The CPU has a direct, local DSRAM port, so program addresses are
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# offsets 0x000-0xfff. DSRAM_BASE is used only by the external debug
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# crossbar; accepting it here is also useful for future mapped tests.
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offset = address if address < MEMORY_BYTES else address - DSRAM_BASE
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if offset < 0 or offset + size > MEMORY_BYTES:
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raise RuntimeError(f"DSRAM access outside 0x1000-0x1fff: 0x{address:08x}")
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return offset
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def load(self, address: int, size: int, signed: bool) -> int:
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offset = self.data_offset(address, size)
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value = int.from_bytes(self.data[offset:offset + size], "little")
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return sign_extend(value, size * 8) & MASK32 if signed else value
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def store(self, address: int, size: int, value: int) -> None:
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offset = self.data_offset(address, size)
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self.data[offset:offset + size] = (value & ((1 << (size * 8)) - 1)).to_bytes(size, "little")
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self.defined[offset:offset + size] = bytes([1]) * size
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self.highest_data_byte = max(self.highest_data_byte, offset + size)
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def step(self) -> bool:
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if self.pc & 3:
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raise RuntimeError(f"misaligned instruction PC 0x{self.pc:08x}")
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index = (self.pc - ISRAM_BASE) // 4
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if index < 0 or index >= len(self.program):
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raise RuntimeError(f"instruction fetch outside program at 0x{self.pc:08x}")
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insn = self.program[index]
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if insn == EBREAK:
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return False
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opcode = insn & 0x7F
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rd = (insn >> 7) & 0x1F
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funct3 = (insn >> 12) & 7
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rs1 = (insn >> 15) & 0x1F
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rs2 = (insn >> 20) & 0x1F
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funct7 = (insn >> 25) & 0x7F
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next_pc = (self.pc + 4) & MASK32
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imm_i = sign_extend(insn >> 20, 12)
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imm_s = sign_extend(((insn >> 25) << 5) | ((insn >> 7) & 0x1F), 12)
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imm_b = sign_extend(
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((insn >> 31) << 12)
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| (((insn >> 7) & 1) << 11)
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| (((insn >> 25) & 0x3F) << 5)
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| (((insn >> 8) & 0xF) << 1), 13)
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imm_u = insn & 0xFFFFF000
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imm_j = sign_extend(
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((insn >> 31) << 20)
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| (((insn >> 12) & 0xFF) << 12)
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| (((insn >> 20) & 1) << 11)
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| (((insn >> 21) & 0x3FF) << 1), 21)
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a, b = self.reg(rs1), self.reg(rs2)
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if opcode == 0x37: # LUI
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self.set_reg(rd, imm_u)
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elif opcode == 0x17: # AUIPC
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self.set_reg(rd, self.pc + imm_u)
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elif opcode == 0x6F: # JAL
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self.set_reg(rd, next_pc)
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next_pc = (self.pc + imm_j) & MASK32
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elif opcode == 0x67 and funct3 == 0: # JALR
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self.set_reg(rd, next_pc)
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next_pc = (a + imm_i) & ~1 & MASK32
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elif opcode == 0x63: # branches
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conditions = {
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0: a == b,
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1: a != b,
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4: signed32(a) < signed32(b),
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5: signed32(a) >= signed32(b),
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6: a < b,
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7: a >= b,
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}
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if funct3 not in conditions:
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raise RuntimeError(f"unsupported branch funct3 {funct3}")
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if conditions[funct3]:
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next_pc = (self.pc + imm_b) & MASK32
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elif opcode == 0x03: # loads
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formats = {0: (1, True), 1: (2, True), 2: (4, True), 4: (1, False), 5: (2, False)}
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if funct3 not in formats:
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raise RuntimeError(f"unsupported load funct3 {funct3}")
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size, signed = formats[funct3]
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self.set_reg(rd, self.load((a + imm_i) & MASK32, size, signed))
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elif opcode == 0x23: # stores
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sizes = {0: 1, 1: 2, 2: 4}
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if funct3 not in sizes:
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raise RuntimeError(f"unsupported store funct3 {funct3}")
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self.store((a + imm_s) & MASK32, sizes[funct3], b)
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elif opcode == 0x13: # immediate ALU
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shamt = rs2
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if funct3 == 0:
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result = a + imm_i
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elif funct3 == 2:
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result = int(signed32(a) < imm_i)
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elif funct3 == 3:
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result = int(a < (imm_i & MASK32))
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elif funct3 == 4:
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result = a ^ imm_i
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elif funct3 == 6:
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result = a | imm_i
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elif funct3 == 7:
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result = a & imm_i
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elif funct3 == 1 and funct7 == 0:
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result = a << shamt
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elif funct3 == 5 and funct7 == 0:
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result = a >> shamt
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elif funct3 == 5 and funct7 == 0x20:
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result = signed32(a) >> shamt
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else:
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raise RuntimeError(f"unsupported OP-IMM instruction 0x{insn:08x}")
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self.set_reg(rd, result)
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elif opcode == 0x33: # register ALU
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key = (funct7, funct3)
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operations = {
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(0x00, 0): lambda: a + b,
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(0x20, 0): lambda: a - b,
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(0x00, 1): lambda: a << (b & 31),
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(0x00, 2): lambda: int(signed32(a) < signed32(b)),
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(0x00, 3): lambda: int(a < b),
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(0x00, 4): lambda: a ^ b,
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(0x00, 5): lambda: a >> (b & 31),
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(0x20, 5): lambda: signed32(a) >> (b & 31),
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(0x00, 6): lambda: a | b,
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(0x00, 7): lambda: a & b,
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}
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if key not in operations:
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raise RuntimeError(f"unsupported OP instruction 0x{insn:08x}")
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self.set_reg(rd, operations[key]())
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else:
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raise RuntimeError(f"unsupported instruction 0x{insn:08x} at PC 0x{self.pc:08x}")
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self.pc = next_pc
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self.regs[0] = 0
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return True
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def run(self, max_instructions: int) -> int:
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for count in range(1, max_instructions + 1):
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if not self.step():
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return count
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raise RuntimeError(f"program did not execute EBREAK within {max_instructions} instructions")
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def data_words(self) -> list[int | None]:
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count = (self.highest_data_byte + 3) // 4
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words: list[int | None] = []
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for i in range(count):
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offset = i * 4
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if all(self.defined[offset:offset + 4]):
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words.append(int.from_bytes(self.data[offset:offset + 4], "little"))
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else:
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words.append(None)
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return words
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def main() -> None:
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parser = argparse.ArgumentParser()
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parser.add_argument("--program", type=Path, required=True)
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parser.add_argument("--data", type=Path)
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parser.add_argument("--regs-out", type=Path, required=True)
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parser.add_argument("--data-out", type=Path, required=True)
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parser.add_argument("--max-instructions", type=int, default=10000)
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args = parser.parse_args()
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model = RV32Model(read_words(args.program), read_words(args.data))
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count = model.run(args.max_instructions)
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write_words(args.regs_out, model.regs)
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write_words(args.data_out, model.data_words())
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print(f"Reference model halted after {count} instructions")
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if __name__ == "__main__":
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main()
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