16 lines
247 B
Plaintext
16 lines
247 B
Plaintext
# Generated processor-test artifacts
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tests/*/program.o
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tests/*/program.hex
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tests/*/sim.log
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# Python cache files
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__pycache__/
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*.py[cod]
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# Cadence/Xcelium simulation output
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sim/behav/WORKSPACE/
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# Submission packaging
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submission_*.zip
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regress.log
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