102 lines
3.6 KiB
Makefile
102 lines
3.6 KiB
Makefile
#--------------------------------------------------------------------
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# Cadence‑only Makefile (Xcelium / SimVision / IMC)
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#--------------------------------------------------------------------
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#--------------------------------------------------------------------
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# Add the following to the testbench
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# initial begin
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# $shm_open("waves.shm");
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# $shm_probe("AC");
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# end
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#--------------------------------------------------------------------
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# ===== User‑configurable variables =================================
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INCLUDE_FILE_NAME ?= cpu.include #this is a placeholder
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TOP ?= tb_processor
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# ===== Paths =======================================================
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CURRENT_DIR := $(shell pwd)
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WORKSPACE := $(CURRENT_DIR)/WORKSPACE
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SCRIPT_DIR := ../../scripts
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PYTHON ?= python3
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# ===== Dynamic macro definitions ===================================
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VERILOG_DEFINES := SIM=1 INST_FILE=\"$(INST_FILE)\"
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ifeq ($(INIT_DATA),1)
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VERILOG_DEFINES += INIT_DATA=1
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VERILOG_DEFINES += DATA_FILE=\"$(DATA_FILE)\"
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endif
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DEFINE_FLAGS := $(foreach def,$(VERILOG_DEFINES),+define+$(def))
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# ===== Help Message ================================================
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.PHONY: help
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help:
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@echo "----------------------------------------------------------------"
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@echo "Administrative targets:"
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@echo " help - this message"
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@echo " clean - remove WORKSPACE directory"
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@echo
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@echo "Compilation targets:"
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@echo " link - generate WORKSPACE/sym_links/"
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@echo " xrun - compile & simulate using Cadence Xcelium"
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@echo " simvision - view waveform database"
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@echo " run_and_view - xrun + simvision"
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@echo " coverage - open coverage in IMC"
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@echo
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@echo " verify_onboarding - (DIGITAL DESIGN ONBOARDING ONLY) check your project for correctness"
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@echo "----------------------------------------------------------------"
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# ===== Administrative Targets ======================================
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.PHONY: clean link
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clean:
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@rm -rf $(WORKSPACE)
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link:
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@mkdir -p $(WORKSPACE)/sym_links
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@rm -rf $(WORKSPACE)/sym_links/*
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@$(PYTHON) link_files.py $(INCLUDE_FILE_NAME)
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# ===== Simulation Targets ==========================================
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.PHONY: xrun simvision run_and_view coverage
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XRUN_FLAGS = -64bit -sv -linedebug -access +rwc \
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-timescale 1ns/10ps \
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$(DEFINE_FLAGS) \
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+testname=$(TESTNAME) \
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+incdir+sym_links \
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-coverage all \
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-licqueue \
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-covoverwrite
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SIM_PLUSARGS ?=
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xrun: link
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cd $(WORKSPACE) && \
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xrun $(XRUN_FLAGS) -f sym_links/sim_no_path.include \
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-top $(TOP) -logfile simulation.log $(SIM_PLUSARGS)
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simvision:
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cd $(WORKSPACE) && simvision waves.shm &
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run_and_view: xrun simvision
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# Need to change IMC path...
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coverage:
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cd $(WORKSPACE) && /tools/software/cadence/vmanager/latest/tools.lnx86/vmgr/bin/imc -load cov_work/scope/test &
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# Generate memory pre and post state files but do not verify correctness
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gen_mem:
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$(MAKE) clean
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$(PYTHON) $(SCRIPT_DIR)/init_mem.py $(WORKSPACE)
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$(MAKE) xrun
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verify_onboarding:
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$(MAKE) clean
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$(PYTHON) $(SCRIPT_DIR)/init_mem.py $(WORKSPACE)
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$(MAKE) xrun
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$(PYTHON) $(SCRIPT_DIR)/check_onboarding.py $(WORKSPACE)/memory_post_state_lower.txt $(WORKSPACE)/sim_memory_post_state_lower.txt
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$(PYTHON) $(SCRIPT_DIR)/check_onboarding.py $(WORKSPACE)/memory_post_state_upper.txt $(WORKSPACE)/sim_memory_post_state_upper.txt
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# ===== Default Target ==============================================
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.DEFAULT_GOAL := run_and_view
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